SPIDER is a Xilinx Cpld based 10Mbps twisted pair to two coaxial cables converter with autonegotiation function. 
This device provides a  replacement  for Ronja Twister in Ronja FSO based systems  and is designed to be connected to a 10Mbps capable twisted pair ethernet device like NIC, switch or hub.
When connected to the autonegotiating device, 10MBps connection is established in half or full duplex mode. 

SPIDER comes with all necessary functions: Cancelation of link integrity pulses from twisted pair and generation of 1MHz idle signal to the optics, while packet is not detected at the input. Cancelation of idle signal from optics via coaxial cable and generation of link integrity pulses while packet is not detected. Autonegotiation capability is secured by flp bursts (consisting of 16 autonegotiation data bits) being sent upon detection of any link partner activity. The autonegotiation data indicate to link partner that this device is capable of running in 10-baseT HD and 10-baseT FD modes.

Advantages:
Compact dimensions (in comparison to Ronja Twister).
Only 3 chips are used in the core compared to 17 used in Twister.
Any bug in the core can be easily fixed without soldering, only a new bitmap must be loaded into the CPLD.
Thanks to simpler PCB pattern the board can be singlesided and made easily under home conditions. 

The whole device consists of two parts. The circuit itself with PCB design and the source code written in Verilog hardware desription language. 

At the beginning only those sources intended for free development (opensource) will be released. PCB design is not yet available in freely editable form as it is designed using a commercial software. There will be enough output data available to manufacture PCBs, but these will not be editable. If anyone decides to redraw the schematic and the PCB layout using gschem and pcb, then we will be happy to add it into official sources.